The present invention relates to a wiring board, a semiconductor device, and a method for manufacturing a wiring board.
A known interposer is used to electrically connect a semiconductor element to a mounting board such as a mother board. An interposer includes a silicon substrate, which has through holes, and a penetration electrode, which is insulated from the silicon substrate.
A typical method for fabricating the penetration electrode will now be described.
As illustrated in FIG. 15A, a silicon substrate 110 is prepared. As illustrated in FIG. 15B, through holes 110X for arranging penetration electrodes on the silicon substrate 110 are fabricated. As illustrated in FIG. 15C, by thermally oxidizing the silicon substrate 110, an insulating film 111 is formed on the outer surfaces of the silicon substrate 110 and wall surfaces of the through holes 110X. As illustrated in FIG. 15D, penetration electrode 112 are fabricated by filling a conductive material in the through holes 110X by electrolytic plating or the like.
In a semiconductor package having fine and highly dense wiring, patterned wires are close to each other. This causes problems such as crosstalk noise between wires or variations in the potential at power lines or the like. Thus, in order to stabilize power voltage and reduce switching noise, a technique of embedding a capacitor (decoupling capacitor) in a wiring board has been proposed (refer to, for example, Japanese Patent No. 3967108). For example, electronic devices such as recent portable terminals that have become compact and thin include thin-film capacitors embedded in wiring boards. Such a thin-film capacitor embedded in a wiring board includes a dielectric layer, which is formed from a high dielectric constant material, and upper and lower electrodes that sandwich the dielectric layer.
Here, one example of a method for embedding and mounting a thin-film capacitor on a wiring board including the penetration electrodes 112 will now be described.
As illustrated in FIG. 15E, a layer 113A that becomes a lower electrode, a layer 114A that becomes a dielectric layer, and a layer 115A that becomes an upper electrode are sequentially deposited on upper surfaces of the insulating film 111, which cover an upper surface of the silicon substrate 110, and the penetration electrodes 112. As illustrated in FIG. 15F, the layers 115A, 114A and 113A are sequentially patterned to predetermined shapes to form an upper electrode 115, a dielectric layer 114, and a lower electrode 113, respectively. This forms the lower electrode 113 and the upper electrode 115 opposed to each other at opposite sides of the dielectric layer 114. As illustrated in FIG. 15G, insulating layers and wires are formed so that the lower electrode 113 and the upper electrode 115 are electrically connected to different pads P1 and P2 formed in an outermost wiring layer. The pads P1 and P2 are used as a power terminal or a ground terminal.
This manufactures the wiring board including the thin-film capacitor formed by sequentially depositing the lower electrode 113, the dielectric layer 114, and the upper electrode 115.